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fn6050 rev 8.00 page 1 of 14 march 14, 2016 fn6050 rev 8.00 march 14, 2016 isl8487, isl814 83, isl81487 1/8 unit load, 5v, low power, high speed or slew rate limited, rs-485/rs-422 transceivers datasheet these intersil rs-485/rs-422 devices are ?fractional? unit load (ul), bicmos, 5v powered, single transceivers that meet both the rs-485 and rs-422 standards for balanced communication. unlike competitive devices, this intersil family is specified for 10% tole rance supplies (4.5v to 5.5v). the ISL81483 and isl81487 pres ent a 1/8 unit load to the rs-485 bus, which allows up to 256 transceivers on the network for large node coun t systems (e.g., process automation, remote meter re ading systems). the 1/4 ul isl8487 allows up to 128 tra nsceivers on the bus. in a remote utility meter reading system, individual (apartments for example) utility meter readings are routed to a concentrator via an rs-485 net work, so the high allowed node count minimizes the numbe r of repeaters required to network all the meters. data fo r all meters is then read out from the concentrator via a sin gle access port, or a wireless link. slew rate limited drivers o n the isl8487 and ISL81483 reduce emi, and minimize r eflections from improperly terminated transmission lines, or unterminated stubs in multidrop and multipoint appl ications. data rates up to 250kbps are achievable with these devices. data rates up to 5mbps are achievable by using the isl81487, which featur es higher slew rates. receiver (rx) inputs feature a fail-safe if open design, which ensures a logic high rx output if rx inputs are floating. driver (tx) outputs are short circuit protected, even for voltages exceeding the power supply voltage. additionally, on-chip thermal shutdown circuitry disables the tx outputs to prevent damage if power di ssipation becomes excessive. these half duplex dev ices multiplex the rx inputs and tx outputs to allow transceivers with rx and tx disable functions in 8 lead packages. features ? fractional unit load allows u p to 256 devices on the bus ? specified for 10% tolerance supplies ? class 3 esd protection (hbm) on all pins. . . . . . . . >7kv ? high data rate version (isl 81487) . . . . . . . up to 5mbps ? slew rate limited versions for error free data transmission (isl8487, ISL81483) . . . . . . .up to 250kbps ? low current shutdown mode (except isl81487) . . 0.5 ? a ? low quiescent supply current: - isl8487, ISL81483. . . . . . . . . . . . . . . . . . 145 ? a (max.) - isl81487 . . . . . . . . . . . . . . . . . . . . . . . . . 420 ? a (max.) ? -7v to +12v common mode input voltage range ? three state rx and tx outputs ? 30ns propagation delays, 5ns skew (isl81487) ? half duplex pinouts ? operate from a single +5 v supply (10% tolerance) ? current limiting and thermal shutdown for driver overload protection ? drop-in replacements for: m ax487 (isl8487); max1483 (ISL81483); max1487, lms1487 (isl81487) ? pb-free plus anneal available (rohs compliant) applications ? high node count networks ? automated utility met er reading systems ? factory automation ? security networks ? building environmental control systems ? industrial/process control networks table 1. summary of features part number half/full duplex no. of devices allowed on bus data rate (mbps) slew-rate limited? receiver/ driver enable? quiescent i cc ( ? a) low power shutdown? pin count isl8487 (no longer available or supported) half 128 0.25 yes yes 120 yes 8 ISL81483 half 256 0.25 yes yes 120 yes 8 isl81487 half 256 5 no yes 350 no 8
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 2 of 14 march 14, 2016 pinout isl8487, ISL81483, isl81487 (pdip, soic) top view ro re de di 1 2 3 4 8 7 6 5 v cc b/z a/y gnd d r truth tables transmitting inputs outputs re de di z y x1101 x1010 0 0 x high-z high-z 1 0 x high-z * high-z * *shutdown mode for isl8487, ISL81483 (see note 7) receiving inputs output re de a-b ro 00 ? +0.2v 1 00 ? -0.2v 0 0 0 inputs open 1 10xhigh-z * 1 1 x high-z *shutdown mode for isl8487, ISL81483 (see note 7) ordering information part no. part marking temp. range (c) package pkg. dwg. # isl8487ibz (note) (no longer available, recommended replacement isl8487eibz) 8487ibz -40 to 85 8 ld soic* (pb-free) m8.15 isl8487ipz (note) (no longer available, recommended replacement isl8487eipz) 8487ipz -40 to 85 8 ld pdip** (pb-free) e8.3 ISL81483ibz (note) 81483ibz -40 to 85 8 ld soic* (pb-free) m8.15 ISL81483ipz (note) 81483ipz -40 to 85 8 ld pdip** (pb-free) e8.3 isl81487ibz (note) 81487ibz -40 to 85 8 ld soic* (pb-free) m8.15 *soic also available in tape and reel; add -t to suffix. **pb-free pdips can be used for through hole wave solder proces sing only. they are not intended for use in reflow solder proce ssing applications. note: intersil pb-free plus anneal products employ special pb-fr ee material sets; molding compounds/die attach materials and 10 0% matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-f ree soldering operations. intersil pb-free products are msl cla ssified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ip c/jedec j std-020.
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 3 of 14 march 14, 2016 pin descriptions pin function ro receiver output: if a > b by at least 0.2v, ro is high; if a < b by 0.2v or more, ro is low; ro = high if a and b are unconn ected (floating). re receiver output enable. ro is enabled when re is low; ro is high impedance when re is high. de driver output enable. the driver outputs, y and z, are enable d by bringing de high. they are high impedance when de is low. di driver input. a low on di forces output y low and output z hi gh. similarly, a high on di forces output y high and output z l ow. gnd ground connection. a/y rs-485/422 level, noninverting receiver input and noninverti ng driver output. pin is an input (a) if de = 0; pin is an outp ut (y) if de = 1. b/z rs-485/422 level, inverting receiver input and inverting dri ver output. pin is an input (b) if de = 0; pin is an output (z) if de = 1. v cc system power supply input (4.5v to 5.5v). typical operating circuits isl8487, ISL81483, isl81487 0.1 ? f + d r 7 6 8 1 2 3 4 5 v cc gnd ro re de di a/y b/z +5v 0.1 ? f + d r 6 7 8 1 2 3 4 5 v cc gnd ro re de di a/y b/z +5v r t r t
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 4 of 14 march 14, 2016 absolute maximum ratings thermal information v cc to ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7v input voltages di, de, re . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to ( v cc +0.5v) input/output voltages a/y, b/z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8v to +12.5v ro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to (v cc +0.5v) short circuit duration y, z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous esd rating hbm (per mil-std-883, method 3015.7) . . . . . . . . . . . . . . >7kv operating conditions temperature range isl8xxxix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40c to 85c thermal resistance (typical, note 1) ? ja (c/w) 8 ld soic package . . . . . . . . . . . . . . . . . . . . . . . . . 170 8 ld pdip package* . . . . . . . . . . . . . . . . . . . . . . . . 140 maximum junction temperatur e (plastic package) . . . . . . . 150c maximum storage temperature range . . . . . . . . . . . -65c to 150c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300c (soic - lead tips only) *pb-free pdips can be used for through hole wave solder processing only. they are not intended for use in reflow solder processing applications. caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 1. ? ja is measured with the component mounted on a low effective ther mal conductivity test board in fr ee air. see tech brief tb379 f or details. electrical specifications test conditions: v cc = 4.5v to 5.5v; unless otherwise specified. typicals are at v cc = 5v, t a = 25c, (note 2) parameter symbol test conditions temp ( c) min typ max units dc characteristics driver differential v out (no load) v od1 full - - v cc v driver differential v out (with load) v od2 r = 50 ? (rs-422), (figure 1) full 2 3 - v r = 27 ? (rs-485), (figure 1) full 1.5 2.3 5 v change in magnitude of driver differential v out for complementary output states ? v od r = 27 ? or 50 ? , (figure 1) full - 0.01 0.2 v driver common-mode v out v oc r = 27 ? or 50 ? , (figure 1) full - - 3 v change in magnitude of driver common-mode v out for complementary output states ? v oc r = 27 ? or 50 ? , (figure 1) full - 0.01 0.2 v logic input high voltage v ih de, di, re full 2 - - v logic input low voltage v il de, di, re full - - 0.8 v logic input current i in1 de, di, re full -2 - 2 ? a input current (a/y, b/z), (note 10) (ISL81483, isl81487) i in2 de = 0v, v cc = 4.5 to 5.5v v in = 12v full - - 140 ? a v in = -7v full - - -120 ? a i in2 de = 0v, v cc = 0v v in = 12v full - - 180 ? a v in = -7v full - - -100 ? a input current (a/y, b/z), (note 11) (isl8487 only) i in2 de = 0v, v cc = 0v, or 4.5 to 5.5v v in = 12v full - - 250 ? a v in = -7v full - - -100 ? a receiver differential threshold voltage v th -7v ? v cm ? 12v full -0.2 - 0.2 v receiver input hysteresis ? v th v cm = 0v 25 - 70 - mv receiver output high voltage v oh i o = -4ma, v id = 200mv full 3.5 - - v receiver output low voltage v ol i o = -4ma, v id = 200mv full - - 0.4 v three-state (high impedance) receiver output current i ozr 0.4v ? v o ? 2.4v full - - ? 1 ? a
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 5 of 14 march 14, 2016 receiver input resistance r in -7v ? v cm ? 12v ISL81483, isl81487 full 96 - - k ? isl8487 full 48 - - k ? no-load supply current, (note 3) i cc isl81487, di, re = 0v or v cc de = v cc full - 400 500 ? a de = 0v full - 350 420 ? a isl8487, ISL81483, di, re = 0v or v cc de = v cc full - 160 200 ? a de = 0v full - 120 145 ? a shutdown supply current i shdn (note 7), de = 0v, re = v cc , di = 0v or v cc full - 0.5 8 ? a driver short-circuit current, v o = high or low i osd1 de = v cc , -7v ? v y or v z ? 12v, (note 4) full 35 - 250 ma receiver short-circuit current i osr 0v ? v o ? v cc full 7 - 85 ma switching characteristics (isl81487) driver input to output delay t plh , t phl r diff = 54 ? , c l = 100pf, (figure 2) full 15 24 50 ns driver output skew t skew r diff = 54 ? , c l = 100pf, (figure 2) full - 2 10 ns driver differential rise or fall time t r , t f r diff = 54 ? , c l = 100pf, (figure 2) full 3 12 25 ns driver enable to output high t zh c l = 100pf, sw = gnd, (figure 3) full - 14 70 ns driver enable to output low t zl c l = 100pf, sw = v cc , (figure 3) full - 14 70 ns driver disable from output high t hz c l = 15pf, sw = gnd, (figure 3) full - 44 70 ns driver disable from output low t lz c l = 15pf, sw = v cc , (figure 3) full - 21 70 ns receiver input to output delay t plh , t phl (figure 4) full 30 90 150 ns receiver skew | t plh - t phl | t skd (figure 4) 25 - 5 - ns receiver enable to output high t zh c l = 15pf, sw = gnd, (figure 5) full - 9 50 ns receiver enable to output low t zl c l = 15pf, sw = v cc , (figure 5) full - 9 50 ns receiver disable from output high t hz c l = 15pf, sw = gnd, (figure 5) full - 9 50 ns receiver disable from output low t lz c l = 15pf, sw = v cc , (figure 5) full - 9 50 ns maximum data rate f max full 5 - - mbps switching characteristics (isl8487, ISL81483) driver input to output delay t plh , t phl r diff = 54 ? , c l = 100pf, (figure 2) full 250 650 2000 ns driver output skew t skew r diff = 54 ? , c l = 100pf, (figure 2) full - 160 800 ns driver differential rise or fall time t r , t f r diff = 54 ? , c l = 100pf, (figure 2) full 250 900 2000 ns driver enable to output high t zh c l = 100pf, sw = gnd, (figure 3, note 5) full 250 1000 2000 ns driver enable to output low t zl c l = 100pf, sw = v cc , (figure 3, note 5) full 250 860 2000 ns driver disable from output high t hz c l = 15pf, sw = gnd, (figure 3) full 300 660 3000 ns driver disable from output low t lz c l = 15pf, sw = v cc , (figure 3) full 300 640 3000 ns receiver input to output delay t plh , t phl (figure 4) full 250 500 2000 ns receiver skew | t plh - t phl | t skd (figure 4) 25 - 60 - ns receiver enable to output high t zh c l = 15pf, sw = gnd, (figure 5, note 6) full - 10 50 ns receiver enable to output low t zl c l = 15pf, sw = v cc , (figure 5, note 6) full - 10 50 ns receiver disable from output high t hz c l = 15pf, sw = gnd, (figure 5) full - 10 50 ns receiver disable from output low t lz c l = 15pf, sw = v cc , (figure 5) full - 10 50 ns maximum data rate f max full 250 - - kbps time to shutdown t shdn (note 7) full 50 120 600 ns electrical specifications test conditions: v cc = 4.5v to 5.5v; unless otherwise specified. typicals are at v cc = 5v, t a = 25c, (note 2) (continued) parameter symbol test conditions temp ( c) min typ max units
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 6 of 14 march 14, 2016 driver enable from shutdown to output high t zh(shdn) c l = 100pf, sw = gnd, (figure 3, notes 7, 8) full - 1000 2000 ns driver enable from shutdown to output low t zl(shdn) c l = 100pf, sw = v cc , (figure 3, notes 7, 8) full - 1000 2000 ns receiver enable from shutdown to output high t zh(shdn) c l = 15pf, sw = gnd, (figure 5, notes 7, 9) full - 800 2500 ns receiver enable from shutdown to output low t zl(shdn) c l = 15pf, sw = v cc , (figure 5, notes 7, 9) full - 800 2500 ns notes: 2. all currents into device pins a re positive; all currents out of device pins are negative. al l voltages are referenced to dev ice ground unless otherwise specified. 3. supply current specification is valid for loaded drivers when de = 0v. 4. applies to peak current. see ty pical performance curves for more information. 5. when testing the isl8487 and ISL81483, keep re = 0 to prevent the device from entering shdn. 6. when testing the isl8487 and ISL81483, the re signal high time must be short enough (typically <200ns) to pr event the device from entering shdn. 7. the isl8487 and ISL81483 are put into shutdown by bringing re high and de low. if the inputs are in this state for less than 50ns, the parts are guaranteed not to enter shutdown. if the inputs are in this sta te for at least 600ns, the parts are guaranteed to have entered shutdown. see low-power shutdown mode section. 8. keep re = v cc , and set the de signal low time >600ns to ensure that the devi ce enters shdn. 9. set the re signal high time >600ns to ensur e that the device enters shdn. 10. devices meeting these limits are denoted as 1/8 unit load ( 1/8 ul) transceivers. the rs-485 standard allows up to 32 unit loads on the bus, so there can be 256 1/8 ul devices on a bus. 11. devices meeting these limits are denoted as 1/4 unit load ( 1/4 ul) transceivers. the rs-485 standard allows up to 32 unit loads on the bus, so there can be 128 1/4 ul devices on a bus. test circuits and waveforms figure 1. driver v od and v oc electrical specifications test conditions: v cc = 4.5v to 5.5v; unless otherwise specified. typicals are at v cc = 5v, t a = 25c, (note 2) (continued) parameter symbol test conditions temp ( c) min typ max units d de di v cc v od v oc r r z y
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 7 of 14 march 14, 2016 figure 2a. test circuit figure 2b. measurement points figure 2. driver propagation delay and differential transition t imes figure 3a. test circuit figure 3b. measurement points figure 3. driver enable and disable times figure 4a. test circuit figure 4b. measurement points figure 4. receiver propagation delay test circuits and waveforms (continued) d de di v cc signal generator c l = 100pf r diff z y c l = 100pf out (y) 3v 0v t plh 1.5v 1.5v v oh v ol 50% 50% t phl out (z) t phl v oh v ol 50% 50% t plh diff out (y - z) t r +v od -v od 90% 90% t f 10% 10% di skew = |t plh (y or z) - t phl (z or y)| d de di c l 500 ? z y v cc gnd sw (shdn) for isl8487 and ISL81483 only. parameter output re di sw c l (pf) t hz y/z x 1/0 gnd 15 t lz y/z x 0/1 v cc 15 t zh y/z 0 (note 5) 1/0 gnd 100 t zl y/z 0 (note 5) 0/1 v cc 100 t zh(shdn) y/z 1 (note 7) 1/0 gnd 100 t zl(shdn) y/z 1 (note 7) 0/1 v cc 100 signal generator out (y, z) 3v 0v 1.5v 1.5v v oh 0v 2.3v v oh - 0.5v t hz out (y, z) v cc v ol 2.3v v ol + 0.5v t lz de output high output low t zl , t zl(shdn) t zh , t zh(shdn) note 7 note 7 note 7 signal generator r ro re a b +1.5v 15pf ro 3v 0v t plh 1.5v 1.5v v cc 0v 50% 50% t phl a
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 8 of 14 march 14, 2016 application information rs-485 and rs-422 are diffe rential (balanced) data transmission standards for use in long haul or noisy environments. rs-422 is a subset of rs-485, so rs-485 transceivers are also rs-422 compliant. rs-422 is a point- to-multipoint (multidrop) standard, which allows only one driver and up to 10 (assum ing one unit load devices) receivers on each bus. rs-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and rece ivers) on each bus. to allow for multipoint operation, the rs-485 spec requires that drivers must handle bus cont ention without sustaining any damage. another important advant age of rs-485 is the extended common mode range (cmr), which specifies that the driver outputs and receiver inputs withstand signals that range from +12v to -7v. rs-422 and rs-4 85 are intended for runs as long as 4000, so the wide cmr is necessa ry to handle ground potential differences, as well as voltages induced in the cable by external fields. receiver features these devices utilize a differential input receiver for maximum noise immunity and common mode rejection. input sensitivity is ? 200mv, as required by the rs-422 and rs-485 specifications. receiver input resistance of 96k ? surpasses the rs-422 spec of 4k ? , and is eight times the rs-485 unit load (ul) requirement of 12k ? minimum. thus, these products are known as one-eighth ul transceivers, and there can be up to 256 of these devices on a network while still complying with the rs-485 loading spec. receiver inputs function wit h common mode voltages as great as ? 7v outside the power supplies (i.e., +12v and -7v), making them ideal for l ong networks where induced voltages are a realistic concern. all the receivers include a fail -safe if open function that guarantees a high level receive r output if the receiver inputs are unconnected (floating). receivers easily meet the dat a rates supported by the corresponding driver, and receiver outputs are three-statable via the active low re input. driver features the rs-485 and rs-422 driver is a differential output device that delivers at least 1.5v across a 54 ? load (rs-485), and at least 2v across a 100 ? load (rs-422). the drivers feature low propagation delay skew t o maximize bit width, and to minimize emi. driver outputs are three-stat able via the active high de input. the isl8487 and isl 81483 driver outputs are slew rate limited to minimize emi, and to minim ize reflections in unterminated or improperly te rminated networks. data rate on these slew rate limited versions is a maximum of 250kbps. isl81487 drivers are n ot limited, so faster output transition times allow dat a rates of at least 5mbps. data rate, cables, and terminations rs-485 and rs-422 are intended for network lengths up to 4000, but the maximum system d ata rate decre ases as the transmission length increases. devices operating at 5mbps are limited to lengths less than a few hundred feet, while the figure 5a. test circuit figure 5b. measurement points figure 5. receiver enable and disable times test circuits and waveforms (continued) 1k ? v cc gnd sw (shdn) for isl8487 and ISL81483 only. parameter de a sw t hz 0 +1.5v gnd t lz 0-1.5vv cc t zh (note 6) 0 +1.5v gnd t zl (note 6) 0 -1.5v v cc t zh(shdn) (note 7) 0 +1.5v gnd t zl(shdn) (note 7) 0 -1.5v v cc signal generator r ro re a b 15pf ro 3v 0v 1.5v 1.5v v oh 0v 1.5v v oh - 0.5v t hz ro v cc v ol 1.5v v ol + 0.5v t lz re output high output low t zl , t zl(shdn) t zh , t zh(shdn) note 7 note 7 note 7
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 9 of 14 march 14, 2016 250kbps versions can operate at f ull data rates with lengths in excess of 1000. twisted pair is the cable of choice for rs-485/rs-422 networks. twisted pair cable s tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ics. to minimize reflections, pro per termination is imperative when using the 5mbps device . short networks using the 250kbps versions need not be te rminated, but, terminations are recommended unless power di ssipation is an overriding concern. in point-to-point, or point-to-multipoin t (single driver on bus ) networks, the main cable sh ould be terminated in its characteristic impedance (typically 120 ? ) at the end farthest from the driver. in multi-re ceiver applications, stubs connecting receivers to the m ain cable should be kept as short as possible. multipoint ( multi-driver) systems require that the main cable be termi nated in its characteristic impedance at both end s. stubs connecting a transceiver to the main cable should be k ept as short as possible. built-in driver ov erload protection as stated previously, the rs-4 85 spec requires that drivers survive worst case bus con tentions undamaged. these devices meet this requirement v ia driver output short circuit current limits, and on-chip t hermal shutdown circuitry. the driver output stages incorp orate short circuit current limiting circuitry which ensures that the output c urrent never exceeds the rs-485 spec, even at the common mode voltage range extremes. addition ally, these devices utilize a foldback circuit which reduces t he short circuit current, and thus the power dissipation, whenever the contending voltage exceeds either supply. in the event of a major short cir cuit condition, these devices also include a thermal shutdow n feature that disables the drivers whenever the die te mperature becomes excessive. this eliminates the power dissipation, allowing the die to cool. the drivers automatically re-enab le after the die temperature drops about 15 degrees. if the contention persists, the thermal shutdown /re-enable cycle repeats until the fault is cleared. receiv ers stay operational during thermal shutdown. low power shutdown mode (excluding isl81487) these cmos transceivers all us e a fraction of the power required by their bipolar coun terparts, but the isl8487 and ISL81483 include a shutdown feature that reduces the already low quiescent i cc to a 500na trickle. they enter shutdown whenever the receiver and driver are simultaneously disabled (re =v cc and de = gnd) for a period of at leas t 600ns. disabling both the driver and the receiver for less than 50ns guar antees that s hutdown is not entered. note that receiver and driver enable times increase when enabling from shutdown. refer t o notes 5-9, at the end of the electrical specification table, for more information. typical performance curves v cc = 5v, t a = 25c, isl8487, ISL81483 and isl81487; unless otherwise speci fied figure 6. driver output current vs differential output voltage figure 7. driver differential output voltage vs temperature differential output voltage (v) driver output current (ma) 012345 0 10 20 30 40 50 60 70 80 90 -40 0 50 85 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 temperature (c) differential output voltage (v) -25 25 75 r diff = 54 ? r diff = 100 ?
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 10 of 14 march 14, 2016 figure 8. driver output current vs short circuit voltage figure 9. supply current vs temperature figure 10. driver propagation delay vs temperature (isl8487, ISL81483) figure 11. driver skew vs temperature (isl8487, ISL81483) figure 12. driver propagation delay vs temperature (isl81487) figure 13. driver skew vs temperature (isl81487) typical performance curves v cc = 5v, t a = 25c, isl8487, ISL81483 and isl81487; unless otherwise speci fied (continued) output voltage (v) -7 -6 -4 -2 0 2 4 6 8 10 12 output current (ma) -60 -40 -20 0 20 40 60 80 100 120 140 160 -80 -100 -120 y or z = high y or z = low isl81487e isl81487e isl8487e, isl81487l isl8487e, isl81487l 100 150 200 250 300 350 -40 0 50 85 temperature (c) i cc (a) -25 25 75 400 isl81487e, de = v cc , re = x isl8487e, isl81487l, de = v cc , re = x isl81487e, de = gnd, re = x isl8487e, isl81487l, de = gnd, re = gnd -40 0 50 85 temperature (c) -25 25 75 propagation delay (ns) t plhy t phly t plhz t phlz 450 500 550 600 650 700 750 -40 0 50 85 temperature (c) skew (ns) -25 25 75 |t plhy - t phlz | |t phly - t plhz | |cross pt. of y ? & z ? - cross pt. of y ? & z ? | 0 50 100 150 200 250 -40 0 50 85 temperature (c) -25 25 75 t plhy t phlz propagation delay (ns) t plhz 16 18 20 22 24 26 28 30 t phly -40 0 50 85 temperature (c) skew (ns) -25 25 75 |t plhy - t phlz| |t phly - t plhz| |crossing pt. of y ? & z ? - crossing pt. of y ? & z ? | 0 1 2 3 4 5
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 11 of 14 march 14, 2016 die characteristics substrate potentia l (powered up): gnd transistor count: 518 process: si gate cmos figure 14. driver and receiver waveforms, low to high (isl8487, ISL81483) figure 15. driver and receiver waveforms, high to low (isl8487, ISL81483) figure 16. driver and receiver waveforms, low to high (isl81487) figure 17. driver and receiver waveforms, high to low (isl81487) typical performance curves v cc = 5v, t a = 25c, isl8487, ISL81483 and isl81487; unless otherwise speci fied (continued) time (400ns/div) 0 receiver output (v) 3 4 1 2 r diff = 54 ? , c l = 100pf 0 5 driver output (v) 0 5 driver input (v) di ro a/y b/z time (400ns/div) 0 receiver output (v) 3 4 1 2 r diff = 54 ? , c l = 100pf 0 5 driver output (v) 0 5 driver input (v) di ro a/y b/z time (20ns/div) 0 receiver output (v) 3 4 1 2 r diff = 54 ? , c l = 100pf 0 5 driver output (v) 0 5 driver input (v) di ro a/y b/z time (20ns/div) 0 receiver output (v) 3 4 1 2 r diff = 54 ? , c l = 100pf 0 5 driver output (v) 0 5 driver input (v) di ro a/y b/z
fn6050 rev 8.00 page 12 of 14 march 14, 2016 isl8487, ISL81483, isl81487 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2004-2016. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. about intersil intersil corporation is a leading provider of innovative power management and precision analog solutions. the company's produc ts address some of the largest marke ts within the industrial and i nfrastructure, mobile computing and high-end consumer markets. for the most updated datasheet, a pplication notes, related docu mentation and related parts, ple ase see the respective product information page found at www.intersil.com . you may report errors or suggesti ons for improving this datashe et by visiting www.intersil.com/ask . reliability reports are also a vailable from our website at www.intersil.com/support . revision history the revision history provided i s for informational purposes onl y and is believed to be accurate, but not warranted. please go to the web to make sure that you have the latest revision. date revision change march 14, 2016 fn6050.8 added rev history and about intersil verb iage. updated ordering information table on page 2. updated m8.15 to current revisi on. pod revision changes are as follows: note 1 "1982" to "1994 changed in typical recommended land pattern the following: 2.41(0.095) to 2.20(0.087) 0.76 (0.030) to 0.60(0.023) 0.200 to 5.20(0.205) updated to new pod format by removing table and moving dimensio ns onto drawing and adding land pattern.
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 13 of 14 march 14, 2016 dual-in-line plastic packages (pdip) c l e e a c e b e c -b- e1 index 12 3 n/2 n area seating base plane plane -c- d1 b1 b e d d1 a a2 l a 1 -a- 0.010 (0.25) c a m bs notes: 1. controlling dimensions: inch. in case of conflict between english and metric dimensions , the inch dimensions control. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. symbols are defined in the mo series symbol list in section 2.2 of publication no. 95. 4. dimensions a, a1 and l are measured with the package seated in jedec seating plane gauge gs - 3. 5. d, d1, and e1 dimensions do not include mold flash or protru- sions. mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. e and are measured with the leads constrained to be per- pendicular to datum . 7. e b and e c are measured at the lead tips with the leads uncon- strained. e c must be zero or greater. 8. b1 maximum dimensions do not include dambar protrusions. dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. n is the maximum number of terminal positions. 10. corner leads (1, n, n/2 and n/2 + 1) for e8.3, e16.3, e18.3, e28.3, e42.6 will have a b1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). e a -c- e8.3 (jedec ms-001-ba issue d) 8 lead dual-in-line plastic package symbol inches millimeters notes min max min max a- 0.210 - 5.33 4 a1 0.015 - 0.39 -4 a2 0.115 0.195 2.93 4.95 - b 0.014 0.022 0.356 0.558 - b1 0.045 0.070 1.15 1.77 8, 10 c 0.008 0.014 0.204 0.355 - d 0.355 0.400 9.01 10.16 5 d1 0.005 - 0.13 -5 e 0.300 0.325 7.62 8.25 6 e1 0.240 0.280 6.10 7.11 5 e 0.100 bsc 2.54 bsc - e a 0.300 bsc 7.62 bsc 6 e b - 0.430 - 10.92 7 l 0.115 0.150 2.93 3.81 4 n8 89 rev. 0 12/93
isl8487, ISL81483, isl81487 fn6050 rev 8.00 page 14 of 14 march 14, 2016 package outline drawing m8.15 8 lead narrow body small outline plastic package rev 4, 1/12 detail "a" top view index area 123 -c- seating plane x 45 notes: 1. dimensioning and tolerancing per ansi y14.5m-1994. 2. package length does not include mold flash, protrusions or ga te burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm ( 0.006 inch) per side. 3. package width does not include interlead flash or protrusions . interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 5. terminal numbers are s hown for reference only. 6. the lead width as measured 0.36m m (0.014 inch) or greater abo ve the seating plane, shall not exceed a maximum value of 0.61mm (0.02 4 inch). 7. controlling dimension: millimete r. converted inch dimensions a re not necessarily exact. 8. this outline conforms to je dec publication ms-012-aa issue c . side view a side view b 1.27 (0.050) 6.20 (0.244) 5.80 (0.228) 4.00 (0.157) 3.80 (0.150) 0.50 (0.20) 0.25 (0.01) 5.00 (0.197) 4.80 (0.189) 1.75 (0.069) 1.35 (0.053) 0.25(0.010) 0.10(0.004) 0.51(0.020) 0.33(0.013) 8 0 0.25 (0.010) 0.19 (0.008) 1.27 (0.050) 0.40 (0.016) 1.27 (0.050) 5.20(0.205) 1 2 3 4 5 6 7 8 typical recommended land pattern 2.20 (0.087) 0.60 (0.023)

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